Chapter IV
Section II
Thinking: how to achieve the following functions?
- Serial port echo
- LED cycle flashing (1 second interval)
- Task 1 and task 2 will not interfere with each other
interrupt
When the system stops the currently running program and transfers to other services, it may be that the program has accepted a request higher than its own priority, or it may set an interrupt artificially. The interrupt is a normal phenomenon.
Hard interrupt
Generated by hardware
Software interrupt
Soft interrupts are generated by the currently running process.
Interrupt processing
- When an abnormal interrupt occurs, the system will jump to the corresponding abnormal interrupt program for execution after processing the current instruction.
- After the exception interrupt program is processed, the program returns to the next instruction where the interrupt instruction occurs for execution.
- When entering the abnormal interrupt, the interrupted program execution site shall be saved. When exiting from the abnormal interrupt handling program, the interrupted program execution site shall be restored.
Basic concepts of EXTI
Root cause of interruption
When a single-chip microcomputer system is running, it is often a simple closed system. However, sometimes external intervention is required, so it can be carried out through interruption.
Interrupts and events
* * at the software level, stm32 interrupts the input signal generated by the line to the NVIC and executes the interrupt service function.
* * when the event is hardware level, the stm32 event line transmits a pulse signal to other peripherals after it is generated.
The event mechanism provides a channel from hardware to trigger automatically to produce results without software participation, reduces CPU load, saves interrupt resources and improves the corresponding speed. It is an effective method to use hardware to improve the event processing ability of CPU chip.
* * interrupt corresponding function
-
A function that handles interrupts. It follows the c function declared by a specific prototype and runs in the interrupt context.
-
The interrupt handler cannot be blocked, and its internal program must run very fast
-
Tell the hardware that it has received the interrupt sent by it. The interrupt service program is usually divided into two parts. The first half: only execute the code that can be executed quickly, such as confirming to the hardware that the interrupt number has been received. Lower part: other work to be completed to execute interrupt trigger
-
Precautions for executing the code in the interrupt context: the code in the interrupt context cannot enter sleep, and the interrupt handler should end as soon as possible.
Interrupt principle
The external signal enters from the input line pin.
Passing edge detection circuit
Suspend the request register through the OR gate interrupt. If the corresponding bit of the interrupt shielding register is 0, the request signal cannot be transmitted to the other end of the and gate to realize interrupt shielding
Section III
Basic concepts of NVIC
Embedded vector interrupt controller ---- closely connected with the kernel, kernel peripherals
Interrupt priority
It includes two priorities: preemptive priority and sub priority
All programmable interrupt sources need to specify these two priorities.
Preemption priority: determines whether interrupt nesting can be generated
Sub priority: determines the interrupt response order
If the two priorities are the same, look at the offset of the interrupt source in the interrupt vector table. The one with a small offset responds first.
NVIC register
- NVIC_ISERx/NVIC_ICERx interrupt enable (set / clear) register
- NVIC_ISPRx /NVIC_ICPRx interrupt pending set / clear register
- NVIC_IABRx activation bit register
- NVIC_IPRx interrupt priority register
- NVIC_STIR software trigger interrupt register
External interrupt idea
- Determine the corresponding external interrupt signal line according to the schematic diagram
- Configure external interrupts
- Select signal source of EXTI
- Select EXTI type: interrupt, event
- Select the trigger mode of exi: rising edge and falling edge
- EXTI enable
code
//key.h
typedef enum{
PRESS,RESS
}KEY_orp;
typedef enum {
CHECK,INTERRUPT
}MODE;
#define KEY_MODE INTERRUPT
extern void key_exit_init(void);
extern void key_nvic_init(void);
extern void KEY_Init(MODE mode);
extern void delay_us(u8 time);
extern u8 key_read(void);
extern u8 flag;
//key.c
#include<stm32f10x_rcc.h>
#include<stm32f10x_gpio.h>
#include<stm32f10x_rcc.h>
#include<stm32f10x_exti.h>
#include<misc.h>
#include<key.h>
//PB12,KEY high level active
//When the key is not pressed, it is always stable at the low level - pull-down
void delay_us(u8 time){
while(time--){
int i = 1000;
while(i--);
}
}
void key_exit_init(void){
EXTI_InitTypeDef KEY_exit;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource12);
KEY_exit.EXTI_Line = EXTI_Line12;
KEY_exit.EXTI_Mode = EXTI_Mode_Interrupt;
KEY_exit.EXTI_Trigger = EXTI_Trigger_Rising;
KEY_exit.EXTI_LineCmd = ENABLE;
EXTI_Init(&KEY_exit);
}
void key_nvic_init(void){
NVIC_InitTypeDef key_nvic;
key_nvic.NVIC_IRQChannel = EXTI15_10_IRQn;
key_nvic.NVIC_IRQChannelSubPriority = 0;
key_nvic.NVIC_IRQChannelPreemptionPriority = 1;
key_nvic.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&key_nvic);
}
void KEY_Init(MODE mode){
GPIO_InitTypeDef KEY;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
//Structure initialization
KEY.GPIO_Mode = GPIO_Mode_IPD;
KEY.GPIO_Pin = GPIO_Pin_12;
//GPIO initialization
GPIO_Init(GPIOB, &KEY);
if (INTERRUPT == mode){
key_exit_init();
key_nvic_init();
}else{}
}
//Read key
u8 key_read(void){
u8 result = 0;
delay_us(10);
result = GPIO_ReadInputDataBit(GPIOB, GPIO_Pin_12);
//Key debounce
if (result == PRESS){
return 0;
}else{
return 1;
}
}
u8 flag = 0;
void EXTI15_10_IRQHandler(void){
if (SET == EXTI_GetITStatus(EXTI_Line12)){
flag = !flag;
}
EXTI_ClearITPendingBit(EXTI_Line12);
}