Nezha D1 runs Arch Linux RISC-V rootfs through TF Card
Nezha D1 runs Arch Linux RISC-V rootfs through TF Card
Make Debian RISC-V TF startup card of RVBoards
For details, please refer to here: "RVBoards Nezha" D1 Debian system image and installation methodAdd the pits that are not mentioned here
according to The kernel cannot access and mount rootfs Introduction here
[ 9.015501] ...
Added by evanluke on Mon, 21 Feb 2022 16:41:53 +0200
RISC-V learning notes [implementation]
EXU unit of hummingbird E200
Hummingbird E200 Series CPU is a two-stage pipeline architecture, and its decoding, execution, delivery and writeback functions are all in the second stage of the pipeline
These functions are completed by the execution unit EXU. The functions of the EXU are as follows
Decode and dispatch the instruction sent from ...
Added by mikes1471 on Mon, 31 Jan 2022 10:37:35 +0200
Pingtouge RVB2601 development board evaluation -- Introduction to OLED and LVGL transplantation
Author: Xi Yue
1, OLED introduction
Our screen adopts 128 * 64 resolution, and the driver ic should be SSD1306. This just supports 129 * 64, but it is a monochrome screen with spi interface.
Initialize first io Mouth:
csi_gpio_pin_t pin_clk;
csi_gpio_pin_t pin_mosi;
csi_gpio_pin_t pin_cs;
csi_gpio_pin_t pin_miso;
static void ...
Added by hammerloaf on Thu, 13 Jan 2022 04:19:58 +0200
riscV bare metal programming
1. General 2. Composition of minimum works 3. Link script 4. Executable program source code analysis 5. Compilation and operation
5.1 compilation 5.2 operation 5.3 commissioning 6. Summary
1. General
Any chip needs a piece of assembly code before startup, which can reflect some characteristics of architecture design. It is often ...
Added by tkm on Tue, 19 Oct 2021 00:08:37 +0300