Serdes series Summary - Xilinx serdes IP usage - 10G serdes
Device: Xilinx zynq 7035 Version: vivado2019.2 Implementation: 10.1376G serdes, a 6664B coded 4-Pair serdes routine with 64bit input and 64bit output, and the reference clock is 153.6MHz Objective: to record the process from simulation to on-board debugging for easy recall
Detailed settings of IP core
First tab GT Selection Second tab GT ...
Added by kitchin on Sat, 16 Oct 2021 20:38:02 +0300